Toshiba Announces 64Mb and 128Mb Page Mode NOR Flash Memory For Next-Generation Wireless Applications

New Devices Can Achieve 60ns, the Fastest Access Time Currently Available

IRVINE, Calif., March 11 /PRNewswire/ -- Strengthening its leadership in flash memory by expanding its NOR offering, Toshiba America Electronic Components, Inc. (TAEC)* with its parent company, Toshiba Corporation (Toshiba) today announced the availability of its 0.16 micron (um) page mode 64 megabit (Mb) and 128Mb NOR flash memory. The new devices are capable of achieving an access time of 60 nanoseconds (ns), the fastest access time currently available for 128Mb NOR flash. They offer page mode access and Read While Write (RWW) dual operation, making them ideal for use in feature-rich cellular phones, PDAs and other wireless handheld applications requiring high-performance memory.

"Although Toshiba currently holds the largest share of the worldwide market for NAND flash, we are also concentrating heavily on developing NOR flash devices to meet growing market demands," said Paul Liu, business development manager for flash memory products at TAEC. "With the addition of 64Mb and 128Mb devices, we have rounded out our NOR offering and are well-positioned to meet the evolving density requirements for handheld applications, as designers within this market continue to incorporate added functionality such as multimedia capabilities that utilize more memory."

Manufactured using a 0.16um design rule, the new NOR devices are capable of fast random access and page access times of 60ns and 20ns respectively. The new devices feature a low operating current considering their fast access times. The operating current of 55 milliamperes (mA) for random reads and 5mA for reads within a page, as well as a low 15mA operating current for program/erase makes them ideally suited for mobile applications. Features include auto program, chip erase, block erase and a write/erase endurance of greater than 100,000 cycles.

With a voltage range of 2.3 volts (V) to 3.6V, the devices are well suited for the mobile communications market. To meet future needs for even lower voltage, Toshiba plans to support 1.8V NOR flash later this year.

Both densities are available in either TSOP or stacked multi-chip packaging (MCP) combined with other memory products to support a variety of applications. MCP packaging caters specifically to the needs of cellular phones, due to its lighter weight and smaller footprint.

     Technical Specifications -- 64Mb NOR Flash

     Operating Voltage                 2.3V to 3.6V

     Random Access Time                60ns (2.7V/30 picofarads (pF))
                                       70ns (2.3V/30pF)

     Page Access Time                  20ns (2.7V/30pF)
                                       25ns (2.3V/30pF)

     Page Size                         8 words

     Operating Current                 Read: 55mA
                                       Page Read: 5mA
                                       Program/Erase: 15mA
                                       Stand By: 10 microamperes (uA)

     Block Erase Architecture          135 blocks total
                                       Boot block: 8 kilobytes (KB) x 8 blocks
                                       Main block: 64KB x 127 blocks

     Dual Operation Bank Architecture 4 banks (8Mb:24Mb:24Mb:8Mb)

     Packaging                        TC58FVM6T2AFT: 48-pin TSOP Type I
                                      TC58FVM6B2AFT: 48-pin TSOP Type I

     Technical Specifications -- 128Mb NOR Flash

     Operating Voltage                 2.3V to 3.6V

     Random Access Time                60ns (2.7V/30pF)
                                       70ns (2.3V/30pF)

     Page Access Time                  20ns (2.7V/30pF)
                                       25ns (2.3V/30pF)

     Page Size                         8 words

     Operating Current                 Read: 55mA
                                       Page Read: 5mA
                                       Program Erase: 15mA
                                       Stand By: 10uA

     Block Erase Architecture          263 blocks total
                                       Boot block: 8KB x 8 blocks
                                       Main block: 64KB x 255 blocks

     Dual Operation Bank Architecture  4 banks (16Mb:48Mb:48Mb:16Mb)

     Packaging                         TC58FVM7T2AFT: 56-pin TSOP Type I
                                       TC58FVM7B2AFT: 56-pin TSOP Type I

Pricing and Availability

Samples of the Toshiba 64Mb NOR devices are available now, priced at $19.00 each. Full production is scheduled for late first quarter, 2002. Samples of the Toshiba 128Mb NOR devices are scheduled to become available this month, priced at $45.00 each, with full production slated for April, 2002.